A typical microelectronics device includes a semiconductor die having a plurality of active bond pads that are wired to package leads of a lead frame. Plastic molding compound is injected around the die, wires and lead frame to form the typical black plastic body that protects the device and its wire connections from the environment.
Recent advancements in packaging technologies include improvements in electrical performance, greater heat dissipation and development of material composition which improve the reliability of devices, all while the dimensions of device packages continue to shrink. With reduced geometries and greater complexity the isolation and analysis of defects has become a greater challenge. Depending on the nature of failure modes, such as shorts, opens, or high resistance, various non-destructive methods including Current Time Domain Reflectometry (CTDR), infrared imaging technology, Scanning Acoustic Microscopy (SAM), and x-ray computed tomography, are used to locate defects. When further physical analysis is needed, it is commonplace to remove the molding compound encapsulating the device.
Conventional decapsulation techniques utilize hot fuming nitric acid, sulfuric acid, or a mixture of the two. Removal of the package material can be selective by forming a sealed reaction volume about the area of interest with an O-ring which isolates the region undergoing decapsulation from the rest of the package. As the process cannot be directly observed, accuracy and repeatability of these techniques are limited. Also, as the geometry of the exposed area is determined by the size and shape of O-ring used, the process does not lend itself to opening up regions of irregular shape, or precisely targeting individual circuit elements. In many cases, failure analysis requires that electrical functionality be maintained after decapsulation to determine the root cause of the device failure. However, metal lines and other materials are severely attacked by chemicals used in conventional wet decapsulation processes. This is especially problematic when only a few failed units are available for isolating defects and determining the root cause of the failure.
Cross-sectioning of microelectronic packages is a valuable analytical procedure widely used within the semiconductor industry. This has been a time-consuming process wherein a device is first sectioned along a plane which is a considerable distance from the area of interest in order to avoid damage to the area of interest during the cutting process. The device is then slowly polished along the plane to remove material until a desired feature becomes exposed along an internal plane for examination. The technique is used in a variety of applications, including package qualification, monitoring of the manufacturing process, incoming quality control, and analysis of failed parts. It can provide results that are unambiguous and can be used as either a sole source of information or a means of validating data gathered from other analytical procedures. Cross sectioning of microelectronic components has been performed using techniques similar to those used in the metallurgical industry. For example, samples can be sectioned with a diamond saw, then mounted in an epoxy matrix and subjected to a series of successively finer fixed abrasives for the material removal process, often being polished to the final finish with an aluminum oxide or similar slurry. While sawing has been adequate for structural or failure analysis of large defects, it has become less effective for failure analysis as the size of defects gets smaller. This is because saw technology is of limited accuracy and imparts high mechanical stress, often resulting in deformation and micro-cracking. Subsequent polishing to remove deformations and fractures is also a very time-consuming process.